They all used to call Mr. Liu Chen enthusiastically, but they were very polite. Now that the equipment has been done, they found out that such a thing is unhappy, so they naturally would not be polite when they speak.

Several professors accused Liu Chen.

Qin Ming and Gong Shu still didn't speak.

Liu Chen said: "Haha, I really forgot about the patent, and I almost forgot about it. This is indeed the case."

Huang Jie hurriedly said, "Yes, do you know this patent applicant?"

"I do know each other." Liu Chen said.

There was a clamor, which undoubtedly admitted that he had just learned this technology from someone else. He was not original or genius, but just a student who could take the exam.

Some ugly faces.

"Not only I know you, but everyone here knows you." Liu Chen said again, laughing.

"We know each other too? That's impossible."

"You should have said it long ago, and you are so passive now."

Qin Ming's face looked a little ugly and said, "Who is this person? We all come from all over the world, so it is impossible for everyone to know each other."

Gong Shu said: "Even if Liu Chen is studying with people and mastering so many technical skills, it is extremely worthwhile. He is definitely a top student specially recruited by our Jianghai University. My research team still needs such talents. When I enter the school, I come and study with the doctoral degree I personally led. When I graduate from undergraduate, my level will be very good. Maybe I can do some innovative research."

Learning existing technologies and innovation are completely different abilities, with much different levels.

This level suddenly decreased. It was originally the treatment of an associate researcher in the research group and the future successor. Well, now it is a student. Let a doctoral student take it with you.

But after all, after speaking to Liu Chen, the voice of criticism was obviously much smaller.

Liu Chen shook his head and said, "Don't everyone care about who has applied for a patent? Then I will tell you, it's nothing."

Everyone listened with their ears.

"That's just one of the many patents I wrote in my bored review stage in my senior year of high school. I've learned these techniques myself. I'm afraid you won't believe it. I'll be generous and tell you directly what I wrote. Don't you really want to know how I can achieve control?"

Liu Chen smiled and said in the frame on the whiteboard.

...

Technical field

The present invention relates to a topology and control method of a multi-level inverter in a dc/dc converter, specifically a multi-level inverter topology and voltage hysteresis loop control based on a series resonant soft switch.

Contents of invention

The purpose of the present invention is to overcome the shortcomings in the above-mentioned prior art, and propose a voltage hysteresis loop control of a multi-level inverter based on a series resonant soft switch. It switches the switching device at the zero-crossing point of the resonant current, so the switching frequency is constant. Since it is a soft switch control, the switching frequency can be very high and the switching loss is small. Combining the multi-level inverter based on a series resonant soft switch with the voltage hysteresis loop control can keep the switching frequency constant. It is easy to achieve fast and stable control of the output voltage.

The present invention is aimed at a series resonant dc/dc converter using a high-frequency multi-level inverter. The converter topology includes: the inverter converts the input stable DC voltage into a variety of pulse level outputs to adjust the amplitude of the series resonance; the series resonance circuit consists of the leakage inductance of the external capacitor c and the transformer t1. If the leakage inductance of the transformer t1 is insufficient, an inductor can be applied to convert the pulse level output by the inverter into a sine waveform to facilitate the boost or down of the transformer t1; the high-frequency uncontrolled rectifier rectifies the high-frequency sinusoidal voltage and obtains the output DC voltage uout.

There are two types of multi-level inverter topology structures proposed, one is called a one-way multi-level inverter, and the other is called a bidirectional multi-level inverter. The ordinary inverter is two bridge arms composed of 4 switching devices, and one level is input. Three levels can be output. The one-way multi-level inverter adds a switching tube to the front or rear end of the ordinary inverter, adds a switching device, adds one input level, adds two output level, and inputs n levels, adds n1 switching devices on one side, and requires a total of n+3 switching devices; the bidirectional multi-level inverter is based on the ordinary inverter, and adds a symmetrical switching device on both sides of the front and rear ends, adds a pair of switching devices, adds one input level, adds two output levels, adds n (n1) switching devices on both sides, and requires a total of 2 (n+1) switching devices.

The present invention is realized through the following technical solutions, which include the following steps:

1. Collection and processing of resonant current

A small resistor is inserted in series into a series resonant circuit, and the initial resonant current ires_p is measured in the form of a voltage. The initial resonant current is the reverse of the actual resonant current, and the voltage follower amplifies it in reverse to obtain ires_in. The phase of the amplified resonant current ires_in is shifted forward ts, and the forward time is the delay time such as the switching of the controller, driving circuit and switching device to ensure that the switching device switches state when the resonant current crosses zero point. The forward resonant current ires_s is converted from a sine waveform to a pulse waveform that the controller can recognize and pass into the controller to detect the zero point. The amplitude of the pulse waveform ires must be the same as the processing level of the controller, and the level of the processor is generally 3.3v or 5v.

2. The acquisition of output voltage

The output voltage uout is measured by a voltage transformer or resistive voltage division method. The resistance voltage division method also requires the power circuit and control circuit to be isolated through a linear optocoupler.

3. Given the voltage comparison value

Voltage hysteresis loop control is divided into direct voltage hysteresis loop control and indirect voltage hysteresis loop control. Direct voltage hysteresis loop control collects the output voltage uout, directly compares with the given voltage comparison value, and inputs the result into the controller; indirect voltage hysteresis loop control is the output voltage uout and the given reference voltage ure through the regulator, and the result is compared with the given voltage comparison value. The given voltage comparison value of the direct voltage hysteresis loop control is directly determined based on the given reference voltage ure and the number of hysteresis loops and changes with the change of the output voltage uout; the given voltage comparison value of the indirect voltage hysteresis loop control is determined based on the parameters of the regulator and the set number of hysteresis loops, and does not change due to changes in the output voltage.

The number of given voltage comparison values ​​depends on the number of output levels of the inverter. The number of inverter input levels n is ui1, ui2, ui3,…,uin, respectively. Then the number of inverter output levels (2n+1) is +uin, +uin1, +uin2,…,+ui1,0, ui1, ui2, ui3,…,uin. Each state outputs one level, so there are (2n+1) states, which are called +n state, +(n1) state, +(n2) state,…,0 state, 1 state, 2 state, 3 state,…,n state, and the number of hysteresis rings is n.

For direct voltage hysteresis loop control, the ring width is 2h1%, 2h2%,…, 2hn% of the given reference voltage ure, respectively, and the comparison value of the given voltage from low to high is: u1, u2,….u2n, then u1=(1hn%)re,u2=(1hn1%)re,u3=(1hn2%)re,…,un=(1h1%)re,un+1=(1+h1%)re,un+2=(1+h2%)re,un+3=(1+h3%)re.…,u2n=(1+hn%)re.

For indirect voltage hysteresis loop control, the output of the set regulator is stable at ur, and the ring width is 2h1%, 2h2%,…, 2hn% of ur, respectively. The given voltage comparison value is u1, u2,….u2n, then u1=(1hn%)r.u2=(1hn1%)r,u3=(1hn2%)r.…,un=(1h1%)r,un+1=(1+h1%)r,un+2=(1+h2%)r,un+3=(1+h3%)r,…,u2n=(1+hn%)r.

4. Determine the next control status

For direct voltage hysteresis loop control, the output voltage uout is compared with the given voltage comparison value. Uout is greater than the given voltage comparison value. The comparator outputs "1", uout is less than the given voltage comparison value. The comparator outputs "0", and 2n comparison results are input into the controller. The controller records that the number of "1" signals is m, and the sum of m and the next output state is n, that is, m=0, the next state is +n, m=1, the next state is +(n1), m=2, the next state is +(n2),…,m=n, the next state is 0, m=n+1, the next state is 1, m=n+2, the next state is 2, m=n+3, the next state is 3,…,m=2n, and the next state is n.

For indirect voltage hysteresis loop control, the output voltage uoutr of the regulator is compared with the given voltage comparison value. Uoutr is greater than the given voltage comparison value. The comparator outputs "1", uoutr is less than the given voltage comparison value. The comparator outputs "0", and 2n comparison results are input into the controller. The controller records that the number of "1" signals is m, and the difference between m and the next output state is n, that is, m=2n, the next state is +n, m=2n1, the next state is +(n1), m=2n2, the next state is +(n2),…,m=n, the next state is 0, m=n1, the next state is 1, m=n2, the next state is 2, m=n3, the next state is 3,…,m=0, and the next state is n.

In addition, the resonant current and the voltage of capacitor c need to be limited, and the maximum limit is set. If one of the two exceeds the set limit, the next output state is forced to be zero or negative. If both exceed the set limit, the next output state is forced to be negative to protect the switching device and prevent overcurrent and overvoltage.

In addition, the amplitude of the pulse signal output by the comparator must be the same as the processing level of the controller, and the processing level of the controller is generally 3.3v or 5v.

5. Output switch control signal

The signals input to the controller include resonant current signal ires that move forward and then become pulse waveforms. There are 2n results of hysteresis comparison. The next state is determined based on the results of hysteresis comparison. The half-period integer multiple of ires is used as the trigger signal to determine the state, and the driving signal of the switching device is output according to the next state. The half-period of ires is the trigger signal of the switching state of the switching device.

According to the different conduction methods of switching devices, there are three basic states of the output of the multi-level inverter. They are positive, zero and negative states. The positive state is that the pulse voltage direction of the multi-level inverter output is the same as the resonant current direction, which enhances the resonant current; the zero state is that the pulse voltage output of the multi-level inverter is zero, and the resonant circuit forms a loop, and the resonant current is only affected by the load; the negative state is that the pulse voltage direction of the multi-level inverter output is opposite to the resonant current direction, which weakens the resonant current. In the same state, the direction of the corresponding multi-level inverter output has different directions of the resonant current, and the switching device corresponds to different conduction methods. The state of the switching device is switched at the zero crossing point of the resonant current, so that the switching loss is zero, and the switching frequency and the series resonant frequency are always the same.

In the zero state, the four basic switching devices of the multi-level inverter turn on the two upper bridge arms or two lower bridge arms. Considering the service life of the switching device, it is not easy to conduct the two upper bridge arms or two lower bridge arms all the time. If the switching device is in reverse parallel with the fast diode, one of the four basic switching devices can also be conducted according to the direction of the resonant current, and a corresponding fast diode is used to replace the switching device connected in parallel with it to form a loop.

For negative states, if the switching devices in the multi-level inverter are connected in parallel with fast diodes, all switching devices can be turned off and the resonant circuit can select the fast diode to be turned on according to its own energy to form a path. This control method is simple. However, n negative states cannot be determined to control. To control the negative state, it is necessary to turn on the switching device. For different resonant current directions, the switching devices that are turned on in a certain negative state are different.

For a one-way multi-level inverter, only one side is added to increase the number of input levels and for the resonant current in both directions. The control switch device can only be "complementary" when conducting. The basic four switching devices are s1h, s2h, s1l, s2l, s1h and s2h to form a bridge arm. S1l and s2l form a bridge arm, and s1h and s1l are two upper bridge arms. S3, s4, s5, and...

,s(n+1), the input level number is n, and the flow from point h to point l is the positive direction of the resonant current. For the t(11) state, the increased input level is ui(n+2t), and when the resonant current is negative, the switching device st and s2l are turned on, or the fast diode d2l in reverse parallel connection between the switching device st and s2l is turned on, and the ui(n+2t) level is output to the resonant circuit. When the resonant current is positive, the ui(n+2t) cannot be output through the conduction of the switching device st

+2t) level, the switching device st and s1l are turned on, or the fast diode d1l in the anti-parallel connection of the switching device st and s1l are turned on, and the ui(n+2t)in level is output to the resonant circuit. Therefore, for the t state where the resonant current is positive, the switching device sn+4t that is complementary to the switching device st must be turned on, and the switching device s1l or the fast diode d1l in the anti-parallel connection of s1l are turned on at the same time, and the ui(t2)in power is output to the resonant circuit.

If the effect is the same, the levels ui(t2) and ui(n+2t) must be complementary, that is, the sum of the two is uin. For each negative state, a "complementary" conduction method can be adopted, requiring the levels of each state to have an arithmetic linear relationship, that is, ui2=2ui1, ui3=3ui1, ui4=4ui1,…, uin=nui1. For the unidirectional multi-level inverter on the back, the negative state is also controlled through the "complementary" conduction method.

For bidirectional multi-level inverter, the switching device is symmetrically added on both sides, s3h, s4h, s5h,…, s(n+1)h is added on the front side, and s3l, s4l, s5l,…, s(n+1)l is added on the back side. For the t(11) state, the increased input level is ui(n+2t), and the input levels of sth and stl are both ui(n+2t). When the resonance current is negative, the switching device sth and s2l are conducting

, or the fast diode d2l inversely connected in the switching device sth and s2l is turned on, and the ui (n+2t) level is output to the resonant circuit. The resonant current is positive, the switching device stl and s2h are turned on, or the fast diode d2h inversely connected in the switching device stl and s2h is turned on, and the ui (n+2t) level is output to the resonant circuit. For bidirectional multi-level inverters, the levels of each state input do not require an arithmetic linear relationship.

For positive states, the one-way multi-level inverter still needs to adopt a "complementary" conduction method. The levels of the inputs of each state must have an arithmetic linear relationship. For the t(11) state, the increased input level is ui(n+2t), and the resonant current is positive. The switching device st and s2l are on, and the ui(n+2t) level is output to the resonant circuit. When the resonant current is negative, the switching device sn+4t complementary to the switching device st is turned on, and the switching device s1l is turned on at the same time, and the ui(n+2t) level is output to the resonant circuit. For the t(11) state, the resonant current is positive, the switching device sth and s2l are turned on, and the ui(n+2t) level is output to the resonant circuit. When the resonant current is negative, the switching device stl and s2h are turned on, and the ui(n+2t) level is output to the resonant circuit.

For the +n state, the resonant current is positive, the switching devices s1h and s2l are on, the resonant current is negative, and the switching devices s1l and s2h are on; in the n state, the resonant current is positive, and the switching devices s1l and s2h are on. If the switching device is inversely connected to the fast diode, it can also be turned on by the fast diodes d1l and d2h, and the resonant current is negative, the switching devices s1h and s2l are on, or it can be turned on by the fast diodes d1h and d2l.

The dc/dc converter based on resonant soft switching technology, which uses a multi-level inverter, switches the on-off of the switching device when the resonant current crosses the zero point, eliminating switching losses. In addition, multiple switching devices are connected in parallel as a switching valve, which can achieve the effect of pressure equalization and current equalization, and make up for the capacity of SFET or IGBT.
Chapter completed!